/*!
 @file           main.h
 @brief          Some macros
 @author         uqbn suqbno@gmail.com
 @version        1
 @date           2021-05-20
 @copyright      Copyright (C) 2021 uqbn
 \n \n
 Permission is hereby granted, free of charge, to any person obtaining a copy
 of this software and associated documentation files (the "Software"), to deal
 in the Software without restriction, including without liMAINation the rights
 to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
 copies of the Software, and to perMAIN persons to whom the Software is
 furnished to do so, subject to the following conditions:
 \n \n
 The above copyright notice and this permission notice shall be included in all
 copies or substantial portions of the Software.
 \n \n
 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 IMPLIED, INCLUDING BUT NOT LIMAINED TO THE WARRANTIES OF MERCHANTABILITY,
 FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
 AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
 OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
 SOFTWARE.
*/

/* Define to prevent recursive inclusion */
#ifndef __MAIN_H__
#define __MAIN_H__

#ifdef __SDCC
#include <8051.h>
#include <stdint.h>
#else
#include <reg51.h>
#define __interrupt(x) interrupt x
/* Interrupt numbers: address = (number * 8) + 3 */
#define IE0_VECTOR  0 /* 0x03 external interrupt 0 */
#define TF0_VECTOR  1 /* 0x0b timer 0 */
#define IE1_VECTOR  2 /* 0x13 external interrupt 1 */
#define TF1_VECTOR  3 /* 0x1b timer 1 */
#define SI0_VECTOR  4 /* 0x23 serial port 0 */
/* sbit pin */
sbit P0_0 = P0 ^ 0;
sbit P0_1 = P0 ^ 1;
sbit P0_2 = P0 ^ 2;
sbit P0_3 = P0 ^ 3;
sbit P0_4 = P0 ^ 4;
sbit P0_5 = P0 ^ 5;
sbit P0_6 = P0 ^ 6;
sbit P0_7 = P0 ^ 7;

sbit P1_0 = P1 ^ 0;
sbit P1_1 = P1 ^ 1;
sbit P1_2 = P1 ^ 2;
sbit P1_3 = P1 ^ 3;
sbit P1_4 = P1 ^ 4;
sbit P1_5 = P1 ^ 5;
sbit P1_6 = P1 ^ 6;
sbit P1_7 = P1 ^ 7;

sbit P2_0 = P2 ^ 0;
sbit P2_1 = P2 ^ 1;
sbit P2_2 = P2 ^ 2;
sbit P2_3 = P2 ^ 3;
sbit P2_4 = P2 ^ 4;
sbit P2_5 = P2 ^ 5;
sbit P2_6 = P2 ^ 6;
sbit P2_7 = P2 ^ 7;

sbit P3_0 = P3 ^ 0;
sbit P3_1 = P3 ^ 1;
sbit P3_2 = P3 ^ 2;
sbit P3_3 = P3 ^ 3;
sbit P3_4 = P3 ^ 4;
sbit P3_5 = P3 ^ 5;
sbit P3_6 = P3 ^ 6;
sbit P3_7 = P3 ^ 7;
#endif                /* __SDCC */

#define SET_BIT(REG, BIT)   ((REG) |= (BIT))
#define CLEAR_BIT(REG, BIT) ((REG) &= ~(BIT))
#define READ_BIT(REG, BIT)  ((REG) & (BIT))
#define CLEAR_REG(REG)      ((REG) = (0x0))
#define WRITE_REG(REG, VAL) ((REG) = (VAL))
#define READ_REG(REG)       ((REG))

#ifndef __SDCC
typedef signed char        int8_t;
typedef unsigned char      uint8_t;
typedef signed short int   int16_t;
typedef unsigned short int uint16_t;
typedef signed long int    int32_t;
typedef unsigned long int  uint32_t;
#endif /* __SDCC */

/* TCON */
#define EXTI0_TRIGGER (1U << 0U) /* 1 rising 0 low */
#define EXTI1_TRIGGER (1U << 2U) /* 1 rising 0 low */
#define TIM0_ENABLE   (1U << 4U)
#define TIM1_ENABLE   (1U << 6U)

/* IE */
#define EXTI0_ENABLE    (1U << 0U)
#define TIM0_INT_ENABLE (1U << 1U)
#define EXTI1_ENABLE    (1U << 2U)
#define TIM1_INT_ENABLE (1U << 3U)
#define UART_INT_ENABLE (1U << 4U)
#define INT_ENABLE      (1U << 7U)

/* IP */
#define INTERRUPT_PRIORITY_EXTI0 (1U << 0U)
#define INTERRUPT_PRIORITY_TIM0  (1U << 1U)
#define INTERRUPT_PRIORITY_EXTI1 (1U << 2U)
#define INTERRUPT_PRIORITY_TIM1  (1U << 3U)
#define INTERRUPT_PRIORITY_UART  (1U << 4U)
#define INTERRUPT_PRIORITY_TIM2  (1U << 5U)

/* T */
#define TIM0_SET(_x) (TH0 = ((_x) >> 8U), TL0 = 0xFFU & (_x))
#define TIM1_SET(_x) (TH1 = ((_x) >> 8U), TL1 = 0xFFU & (_x))
#define TIM0_GET     ((TH0 << 8U) + TL0)
#define TIM1_GET     ((TH1 << 8U) + TL1)

/* Enddef to prevent recursive inclusion */
#endif /* __MAIN_H__ */

/* END OF FILE */
